CS 452/652 Fall 2019 - Lecture 5

• conceptual reasons: divide problem, separation of concerns
• practical reasons: parallel hardware

• multiple tasks each with synchronous control flow

• uninterruptible (thus predictable) system manager
• hardware typically supports at least "user" and "system" modes
• "system" mode: with all privileges
  → "dangerous" operations possible

Task

Abstraction

• type / shared: code, readonly data, write-once?
• instance / private: state - read/write data
  • primarily on stack
  • ok to use static global for singleton tasks with subroutines

State

• management state: Ready, Active, Blocked, etc.
  → need queues for management
• meta information: parent task
• execution state
  • high-level language: line of code, variables
  • machine-level: program counter, stack (content, pointer), status register, other registers

Descriptor

• in-kernel data structure hold task state
• no heap → use intrusive linkage, i.e., embed 'next' pointer

Execution State

• see ARM Architecure Reference Manual, Sections A1, A2 (showed PDF Pages 29, 41, 43).
• R0-R15 registers
  • operands for processor operation
  • special purpose: r13/sp (stack pointer), r14/lr (link register), r15/pc (program counter)
• PSR: Processor Status Register
  • condition codes (N,Z,C,V)
  • interrupt flags
  • processor mode
  • etc.
• per-mode instances of ('banked') registers, CPSR vs. SPSR
  • other instances not directly usable/accessible
  • but needed for mode switch (more later)

Context Switch

• save / restore execution state
• similar to and presents as subroutine call

Subroutine Call

• starting point for context switch considerations
• Application Binary Interface (ABI) defines rules subroutine call: ARM Call Standard
  • argument passing: r0-r3, rest on stack
  • stack pointer alignment: 8 bytes
  • caller-saved registers (subroutine can overwrite): r0-r3, r12, lr, psr
  • callee-saved registers (subroutine must preserve): r4-r11, sp, lr
  • call/return uses lr, thus both caller- and callee-saved
• call subroutine: branch-and-link (lr := pc + 4)
  bl <destination>
• return from subroutine (pc := lr)
  bx lr, OR
  mov pc, lr

Stack Switch

• simplest form of context switch
• used for coroutines, user-level threading, or inside multi-threaded kernel
• could be declared as

  void stackswitch(char* newSP, char** oldSP);
  

• implemented in assembler
  1. push callee-saved registers on stack
  2. save stack pointer into memory location r1
  3. load stack pointer from register r0
  4. pop callee-saved registers from stack
  5. return
• seems easy, why? direct access to both stacks, only store callee-saved registers

Mode Switch

• no direct access to both stacks
• to be continued...