CS 452/652 Winter 2022 - Lecture 1

Course Overview

• purpose: tackle a difficult and sizeable implementation project!
• key characteristics
  • full-stack, including low-level communication
  • timely interaction with real-world system: latency bottleneck
  • robustness against defects (train, switch, sensor)

Software Development

• small kernel
  • no memory translation/protection, no file system
  • micro-kernel with send-receive-reply (SRR) communication
  • multi-threading, no locking -> concurrency & non-determinism
  • interrupt handling
• train control
  model and control real-world system in software
  • address multi-dimensional problem space

System Overview

• train set, controller, ARM computer, Track PC, TFTP server, development computer
• development
  • two-box model: development vs. execution
  • manual linking and loading
  • gcc/g++ with basic library support → freestanding: no heap
  • rudimentary gdb support
  • example code provided

Assignment 0

• assignment is out and due next week → start now
• generic polling loop

  for (;;) {
    if (c1) a1();
    if (c2) a2();
    ...
  }